IPCMDERRCODE=IPCMDERRCODE_0, AHBCMDERRCODE=AHBCMDERRCODE_0
Status Register 1
| AHBCMDERRID | Indicates the sequence index when an AHB command error is detected. This field will be cleared when INTR[AHBCMDERR] is write-1-clear(w1c). |
| AHBCMDERRCODE | Indicates the Error Code when AHB command Error detected. This field will be cleared when INTR[AHBCMDERR] is write-1-clear(w1c). 0 (AHBCMDERRCODE_0): No error. 2 (AHBCMDERRCODE_2): AHB Write command with JMP_ON_CS instruction used in the sequence. 3 (AHBCMDERRCODE_3): There is unknown instruction opcode in the sequence. 4 (AHBCMDERRCODE_4): Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence. 5 (AHBCMDERRCODE_5): Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence. 14 (AHBCMDERRCODE_14): Sequence execution timeout. |
| IPCMDERRID | Indicates the sequence Index when IP command error detected. This field will be cleared when INTR[IPCMDERR] is write-1-clear(w1c). |
| IPCMDERRCODE | Indicates the Error Code when IP command Error detected. This field will be cleared when INTR[IPCMDERR] is write-1-clear(w1c). 0 (IPCMDERRCODE_0): No error. 2 (IPCMDERRCODE_2): IP command with JMP_ON_CS instruction used in the sequence. 3 (IPCMDERRCODE_3): There is unknown instruction opcode in the sequence. 4 (IPCMDERRCODE_4): Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence. 5 (IPCMDERRCODE_5): Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence. 6 (IPCMDERRCODE_6): Flash access start address exceed the whole flash address range (A1/A2/B1/B2). 14 (IPCMDERRCODE_14): Sequence execution timeout. 15 (IPCMDERRCODE_15): Flash boundary crossed. |